Electric and/or hybrid internal combustion engine (ICE) and electric vehicles can utilize relatively large motors. For example, an electric-only vehicle may be powered by a 100 kilowatt electric motor, driven off of a 300 V battery pack.
At such power ratings, it is desirable to minimize the magnitude of current flowing through the inverter and electric motor to reduce I2R power losses and reduce the size of wires and their connectors. Lower current flows can also enable the electric motor to be made smaller and have less heat loss. However, this objective must be balanced against the voltage that the battery provides and the breakdown limitations of the inverter switches. Practical electric vehicle batteries have voltage and current limitations associated therewith as the battery can only handle a certain state of charge. And switches with high breakdown voltages tend to cost more.
The efficiency of the inverter is also a prime design consideration. Multi-level inverters, which utilize an array of switching devices in series to perform the power conversion in a small increase of voltage steps by synthesizing a staircase voltage from several levels of series DC capacitor voltages connected in parallel with a power source, are known in the art. The multi-level inverter has lower dv/dt stresses on the switching devices in comparison to a conventional PWM inverter due to smaller voltage increments and thus can utilize smaller rated semiconductor devices. The multi-level inverter also features a better output voltage in terms of less distortion, lower harmonic content and lower switching losses in comparison to a conventional full bridge PWM inverter. See for example Mailah et. al, “Neutral-Point-Clamped Mutlilevel Inverter Using Space Vector Modulation”, ISSN 1450-216X Vol. 28, No. 1 (2009), pp. 82-91, EuroJournals Publishing, Inc.
One well-known neutral-point-clamped (NPC) PWM inverter is described by Nabae et al., “A New Neutral-Point-Clamped PWM Inverter”, IEEE Transactions on Industry Applications, Vol. 1A-17, No. 5, September/October 1981 and reproduced here as FIG. 1A. Discussing only one leg, in this inverter S11, S14 are the main transistors that act as PWM switches coupling load phase A to the positive and negative bus of the power source Ed. S12, S13 are auxiliary transistors that, together with diodes D11, D12, clamp the output terminal (A) to the neutral point potential N. The auxiliary transistors S13, S12 are driven complementary to the main transistors S11, S14, respectively. FIG. 1B shows the drive signals for the transistors, which may be provided utilizing conventional PWM techniques, such as by comparing a sinusoidal control voltage against a higher frequency triangular switching reference signal. FIG. 1C shows the output voltage waveforms for the inverter.
It would be desirable to utilize an inverter topology such as the NPC PWM inverter to drive an electric motor at a much higher voltage than that provided by the battery. And in such a use, it would be desirable to operate the inverter to minimize switching losses.